Method for manufacturing a semiconductor structure, and a corresponding semiconductor structure

ABSTRACT

A method for manufacturing a semiconductor structure is provided which includes the following steps: a crystalline semiconductor substrate ( 1 ) is supplied; a porous region ( 10 ) is provided adjacent to a surface (OF) of the semiconductor substrate ( 1 ); a dopant ( 12 ) is introduced into the porous region ( 10 ) from the surface (OF); and the porous region ( 10 ) is thermally recrystallized into a crystalline doping region ( 10′ ) of the semiconductor substrate ( 1 ) whose doping type and/or doping concentration and/or doping distribution are/is different from those or that of the semiconductor substrate ( 1 ). A corresponding semiconductor structure is likewise provided.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is a divisional application of U.S. patentapplication Ser. No. 12/282,842 filed on Mar. 2, 2009, which is anational phase application based on international applicationPCT/EP2007/052227 filed on Mar. 9, 2007, and claims priority to GermanPatent Application No. DE 10 2006 012 857.5, filed on Mar. 21, 2006, allof which are hereby incorporated by reference in their entireties.

BACKGROUND INFORMATION

The present invention relates to a method for manufacturing asemiconductor structure, and a corresponding semiconductor structure.

In the broader sense, the present invention relates to a modification inthe material properties of a semiconductor substrate made, for example,of silicon or silicon carbide, beginning from a surface of thesemiconductor substrate. Modifications of this type may involve, forexample, the setting of a certain conductivity or conductivity type (por n doping).

Although it is applicable, in principle, to numerous othermicromechanical or microelectronic semiconductor structures, the presentinvention and its underlying object are explained on the basis ofmicromechanical pressure sensors.

FIG. 3 shows a schematic cross-sectional view of a known semiconductorstructure. In FIG. 3, reference numeral 1 designates a semiconductorsubstrate made of silicon, for example of the p-type, and referencenumeral 5 designates a doping region on surface OF of semiconductorsubstrate 1, for example of the n-type, which has a depth t′ of 10 μm.

Doping regions 5 of this type are usually achieved by diffusing foreignatoms into semiconductor substrate 1 from surface OF. In the case of asilicon semiconductor substrate 1, a source of dopants is deposited forthis purpose onto the wafer surface (e.g., phosphorus glass for p dopingor boron glass for n doping) and subsequently thermally driven in at ahigh temperature, i.e., the dopants are excited for the purpose ofdiffusion into silicon substrate 1 from surface OF. Alternatively, thedopants are also implantable into the wafer surface in a layer having anoriginal thickness of typically 1 μm to 2 μm, this layer beingsubsequently thermally diffused deeper into silicon semiconductorsubstrate 1.

Diffusion processes of this type are generally limited to a relativelythin layer thickness from surface OF of semiconductor substrate 1, sinceforeign substances such as dopant atoms diffuse only slowly intosilicon, even at very high temperatures, and therefore in practice areable to achieve depths of only typically 20 μm to 25 μm in silicon, atleast within economically justifiable diffusion times. Foreign atoms,such as antimony (Sb) or germanium (Ge), etc., exist which diffuse onlyextraordinarily slowly, due to their large atom diameter, so that noteven the specified limit of typically 20 μm to 25 μm in silicon isachievable using these foreign atoms, but instead the diffusion depthswithin justifiable times remain substantially below this level. In thecase of silicon carbide, a complicating factor is that diffusion itselftakes place extremely slowly even at very high temperatures of 1,400° C.The silicon carbide lattice is a substantial diffusion barrier, whichgreatly blocks a penetration of foreign atoms and limits diffusionprocesses to a penetration depth of just a few micrometers.

In micromechanical applications, in particular, however, thicker layersof, for example, silicon or silicon carbide having modified layerproperties, for example a modified conductivity type, are frequentlyrequired, so that the aforementioned limits of thermal diffusionprocesses in the bulk material are problematic. Examples may includethick monocrystalline, n-type silicon layers having a thickness of, forexample, 100 μm to 200 μm on a p-type semiconductor substrate, such asthose advantageously used for high-pressure sensors in silicon inconnection with an electrochemical etch stop from p-type to n-typesilicon. This also applies to the manufacture of thick silicon bendingbeam structures using an electrochemical etch stop from the back and, inplasma trench techniques, from the front, as well as to the manufactureof thin silicon films having a thickness of 100 μm to 200 μm and desireddoping by electrochemical etching or anodizing up to a p-n junction. Thesame applies to silicon carbide in the case of media-resistant,high-temperature-compatible sensors as well as the manufacture ofsilicon carbide films using known smart cut methods via doping-selectiveelectrochemical anodizing or etching methods.

Methods for manufacturing porous regions in silicon semiconductorsubstrates are known from DE 100 32 579 A1 and DE 10 2004 036 032 A1.

The object of the present invention, therefore, is to provide a methodfor manufacturing a semiconductor structure and a correspondingsemiconductor structure which, from the process-engineering point ofview, enable simple manufacturing of deep doping regions in asemiconductor substrate.

SUMMARY OF THE INVENTION

The method according to the present invention for manufacturing asemiconductor structure according to Claim 1 and the correspondingsemiconductor structure according to Claim 11 have the advantage thatthey enable the manufacture of thick layers of crystalline semiconductormaterial having modified properties by introducing foreign atoms orforeign substances. Alternatively, the layers may also be given apolycrystalline structure. On the one hand, modified layers may thus bemanufactured in a thickness which would otherwise not be economical tomanufacture in such a great layer thickness. On the other hand, foreignatoms are introducible which diffuse only very slowly and therefore maynot be introduced in a practical manner into layers, for exampleantimony or germanium or other atoms having a large atom radius.

Modified layers may also be manufactured, for example in siliconcarbide, where the diffusion-inhibiting base material SiC wouldotherwise make layer modification impossible or nearly impossible. It istherefore possible to modify materials in this manner across great layerthicknesses which would otherwise not be modifiable or dopable usingmethods according to the related art, due to their material properties.

In addition, the method described above may be used to achieve entirelynew material properties by introducing large quantities of foreignatoms, which would otherwise not be introducible in such high doses.

The subclaims describe advantageous refinements of and improvements onthe particular subject matter of the present invention.

The idea underlying the present invention is to create a porous regionadjacent to a surface of a semiconductor substrate, in which a dopantmay be introduced, after which the porous region is thermallyrecrystallized.

To provide the porous region, the method suitably uses electrochemicalanodizing. For example, porous silicon or porous silicon carbide isnanoporously or mesoporously producible by selecting correspondinganodizing conditions, essentially current density and hydrofluoric acidconcentration.

Using electrochemical anodizing, it is possible to unproblematicallymanufacture thick porous layers having a vertical dimension of, forexample, 100 μm to 300 μm. This skeleton of nanoscale or mesoscalesilicon or silicon carbide may subsequently be provided with foreignatoms in full thickness.

For this purpose, the dopants may be supplied in the form of a carriergas (e.g., boroethane, arsine, phosphine, etc.), which penetrates thestructure. Alternatively, a glass such as boron glass or phosphorusglass may be deposited on the surface or a precursor dissolved in liquidmay be used to saturate the porous structure. Organic and anorganiccompounds of boron, phosphorus (e.g., trimethylphosphite, phosphoruspentaxyde), arsenic (vinyl arsine), antimony, germanium (tetraethylgermanium), aluminum, iron, lead, etc., or their soluble salts (e.g.,chlorides, iodides, bromides, etc.), which are soluble in liquids havinga low surface tension, such as alcohols or water or alcohol/watermixtures or other organic solvents, may be used as the precursor. In apreferred specific embodiment, the dopants are supplied in the form of acarrier gas, the gas homogeneously penetrating the porous region at ahigh temperature of, for example, 900° C., and the foreign atomssimultaneously diffusing from the gas phase into the nanostructure. Inthis exemplary embodiment, the thermal treatment for deposition and thethermal treatment for driving in the dopant occur at the same time.

It is particularly advantageous to dissolve doping atoms insupercritical CO₂, since this substance has no surface tension andtherefore is able to particularly easily penetrate and functionalizenanostructures or mesostructures, i.e., coat them with foreign atoms. Itmay be suitable to add so-called co-solvents to supercritical CO₂ forthe purpose of using solvatization to dissolve foreign substances whichdo not easily dissolve in CO₂. As mentioned above, the advantage of thesupercritical state is the fact that every point in the depth of theporous material is effortlessly reachable, and the foreign substancesmay be transported and deposited everywhere in approximately the sameconcentration. In the preferred specific embodiment, the porous regionmay be saturated using a solution of foreign atoms in a liquid, inparticular in supercritical CO₂, at room temperature, whereupon atemperature step immediately takes place at 900° C. for driving in and afurther temperature step at 950° C. for recrystallization and drivingin.

The step for thermally driving in the foreign atoms is preferablycarried out separately at a temperature at which structuralrearrangement is not yet able to take place. At a temperature of, forexample, 900° C., foreign atoms diffuse into the delicate nanostructuresthroughout the entire volume of the porous structure in silicon andpenetrate these structures nearly homogeneously. The stability of thenanostructure is additionally supported by the fact that natural oxideson the structure surface additionally stabilize the latter and preventthermal rearrangement. In the case of silicon, such oxides decay only attemperatures above 950° C. and, in the case of silicon carbide, onlyabove 1,200° C.

In the recrystallization step, the porous region is thermally collapsedat high temperatures, for example above 950° C. in the case of siliconand above 1,200° C. in the case of silicon carbide, a solidmonocrystalline layer in the sense of bulk material resulting byrearranging the silicon atoms or silicon carbide. Initially, thisrearrangement was still undesirable for enabling the foreign atoms toreach all parts of the nanostructure and for avoiding damage toindividual regions of the structure. At these elevated temperatures, thenative oxide layers supporting the nanostructure are now evaporated,which may be additionally supported by adding hydrogen gas. Without thestabilization via the surface oxides, the thermal rearrangement of thestructure may begin quickly and continue until the structure iscompletely compressed into a monocrystalline material. This makes itpossible to have foreign atoms penetrate thick layers of silicon orsilicon carbide in a controlled manner, in what is on the whole aneconomical overall process using electrochemical anodizing in connectionwith one or more relatively short high-temperature steps.

BRIEF DESCRIPTION OF THE DRAWINGS

Exemplary embodiments of the present invention are illustrated in thedrawings and explained in greater detail in the following description.

FIGS. 1 a through d show schematic cross-sectional views of theessential manufacturing steps of a method for manufacturing asemiconductor structure according to a specific embodiment of thepresent invention.

FIG. 2 shows a flow chart for explaining the sequence of the essentialmanufacturing steps of the method for manufacturing a semiconductorstructure according to the specific embodiment of the present invention.

FIG. 3 shows a schematic cross-sectional view of a known semiconductorstructure. essential manufacturing steps of a method for manufacturing asemiconductor structure according to a specific embodiment of thepresent invention.

DETAILED DESCRIPTION OF THE INVENTION

In the figures, the same reference numerals designate identical orfunctionally identical components.

FIGS. 1 a through d show schematic cross-sectional views of theessential manufacturing steps of a method for manufacturing asemiconductor structure according to a specific embodiment of thepresent invention, and FIG. 2 shows a flow chart for explaining thesequence of the essential manufacturing steps of the method formanufacturing a semiconductor structure according to the specificembodiment of the present invention.

In FIG. 1 a, reference numeral 1 designates a silicon semiconductorsubstrate of the p type having a surface OF.

According to FIG. 1 b, a mask 2 made of silicon nitride is applied tosurface OF (Step S1), and a nanoporous region 10 having a depth t of 100μm is subsequently introduced by electrochemical anodizing (Step S2),this region having a network of pores 10 a which form an interconnectedskeleton.

In a subsequent process step S3, which is illustrated in FIG. 1 c, aglass 12, for example phosphorus glass, is first introduced into porousregion 10 at a temperature of 900° C., a diffusion of the phosphorusinto the skeleton made of nanoscale silicon simultaneously taking placedirectly at this temperature and the phosphorous thus homogeneouslypenetrating therein. With reference to FIG. 1 d, a temperature step S4then takes place at a temperature of more than 950° C., rearrangement ofthe silicon atoms thus resulting in a thermal recrystallization ofporous region 10 into a crystalline doping region 10′ of semiconductorsubstrate 1, whose doping type, doping concentration and dopingdistribution are different from those of semiconductor substrate 1.

Although the present invention was described on the basis of a preferredexemplary embodiment, it is not limited thereto.

As an alternative to the above exemplary embodiment, the dopants may beintroduced either in the form of a carrier gas or in the form of aliquid solution which penetrates the porous structure.

Although the semiconductor structure in the above example was formedusing the mask made of silicon nitride, it is also possible to providean edge doping in the semiconductor substrate which surrounds the regionto be made porous on the sides and serves as an etch mask. A doping ontothe back of the substrate may also be provided for the anodic process.

The application stated in the above example for a micromechanicalpressure sensor is provided purely by way of example and may be modifiedin any manner.

1-11. (canceled)
 12. A semiconductor structure, comprising: acrystalline semiconductor substrate; and a crystalline doping region inthe form of a trough adjacent to a surface of the semiconductorsubstrate, wherein at least one of a doping type, a dopingconcentration, and a doping distribution of the crystalline dopingregion is different from that of the semiconductor substrate, andwherein the doping distribution is substantially homogeneous across anentire depth of the doping region.
 13. The semiconductor structure ofclaim 12, wherein the semiconductor substrate is made of at least one ofsilicon and silicon carbide.
 14. The semiconductor structure of claim13, wherein a dopant is distributed throughout an entire volume of thecrystalline doping region.
 15. The semiconductor structure of claim 13,wherein the doping region is saturated.
 16. The semiconductor structureof claim 13, wherein the doping region is monocrystalline.
 17. Thesemiconductor structure of claim 12, wherein a depth of the crystallinedoping region is at least 50 μm from the surface.
 18. The semiconductorstructure of claim 17, wherein the semiconductor substrate is made of atleast one of silicon and silicon carbide.
 19. The semiconductorstructure of claim 17, wherein a dopant is distributed throughout anentire volume of the crystalline doping region.
 20. The semiconductorstructure of claim 17, wherein the doping region is saturated.
 21. Thesemiconductor structure of claim 17, wherein the doping region ismonocrystalline.
 22. The semiconductor structure of claim 12, wherein adopant is distributed throughout an entire volume of the crystallinedoping region.
 23. The semiconductor structure of claim 12, wherein thedoping region is saturated.
 24. The semiconductor structure of claim 12,wherein the doping region is monocrystalline.